Background
The
object of this project is thin high-k gate stacks (HfSiO, 70%), which is bind
up with MOSFET, while silicon-based integrated circuits have developed rapidly
in the past years. High-k dielectric materials are one of the most popular
research topics in the micro electronic industry. By using some special
properties of some high-k dielectric materials, some new devices may be
conducted and the limitation of the thin gate-oxide faced in semiconductor
industry may be solved.
Electronics
based on these improve the life quality and make our life more comfortable,
like internet and mobile phones. On the basis of Moore’s law, the number of
transistors on the integrated circuits doubled every two years, so that the
gate stacks become the concern issue. Scientists and engineers made great
efforts to incorporate the high-k dielectric into a transistor. According to
SIA [1], in order to maintain the development speed of the semiconductor,
researchers should develop constraints like new models or new materials, as the
silicon-based semiconductor industry is rising so fast, and it is almost
reached the limits if we want to make the size smaller. The only way is to
increase the dielectric constant while the thickness of the dielectric medium
is constant, to maintain the same capacitance and reduce the capacitance area.
So, in this project, all the teammates used the high-frequency capacitance
voltage characteristic data and identified some properties like EOT and doping
density, in order to have a better understanding of the thin high-k gate stacks.
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